Cryogenic CMOS electronics

While silicon-based complementary metal-oxidesemiconductor (CMOS) technology constitutes the mainstream of electronics, research for the beyond-CMOS era focuses mostly on devices relying on new materials and/or quantum features. Although circuits can be made with these advanced devices, like graphene-based oscillators or single-electron transistors (SETs) , a first step is to interface these quantum nanoelectronic devices with conventional CMOS circuits. The integration with mainstream technology is greatly simplified when the novel device is silicon based. Hybrid circuits using a small number of field-effect transistors (FETs) and SETs have been demonstrated. Recently, Ward et al.  cointegrated large field-effect transistors used as switches for multiplexing the test of a large number of quantum dots at low temperature. Using only GaAs technology operated a switch matrix at cryogenic temperature for driving quantum bits. Closer to mainstream silicon technology, Suzuki et al.  integrated a SET device with a one-bit CMOS selector. Here we demonstrate the cointegration of SETs with a more complex logic circuit, on an industrial-scale CMOS facility, on 300-mm wafers. We design, fabricate, and operate at cryogenic temperature a SET relying on well-controlled dimensions and a ring oscillator (RO) CMOS circuit designed for low-temperature operation, made with more than 600 FETs. The different FET or SET behavior is obtained by varying the width of transistors all fabricated with the fully depleted silicon-on-insulator (FD SOI) nanowire technology. The RO output feeds a nonoverlapping clock generator which delivers two phaseshifted square wave signals at radio frequency onto the gates of the SET device. When the rf is turned on, we observe a dc current in the SET at zero source-drain bias due to the rectification effect. This effect naturally arises when sufficiently large RF signals are applied to a nonlinear device.